International Patent Publication No. WO 2009/106069 A1 discloses an optoelectronic semiconductor chip wherein a first and a second electrical contact layer are arranged between the semiconductor layer sequence and the carrier substrate. In this case, the first and the second electrical contact layer are insulated from one another by means of an electrically insulating layer. In the case of a semiconductor chip of this type, a mirror layer, at a side facing the carrier substrate, can adjoin the semiconductor layer sequence in order to deflect the radiation emitted by the active zone in a direction of the carrier to a radiation coupling-out area lying opposite the carrier substrate.
In the case of a semiconductor chip of this type, there may be the risk of moisture being transported from the edges of the semiconductor chip through the electrically insulating layer right into the region of the minor layer, which would result in a degradation of the minor layer and, consequently, a reduction of the radiation efficiency.